Loading...
Images of Jeong-Taek Kong
(0 from 0 )1
0
0
News
Primarius Technologies Co. Ltd. A (China: Shanghai)
www.wsj.com
Shi Song Li Member-Supervisory Board. Bao Lei Zhao Member-Supervisory Board. Jeong Taek Kong Independent Director. Bing Qiang Gao Independent Director. › quotes › XSHG › company-people
DATE: Optimising power in IC design - Electronics Weekly
www.electronicsweekly.com
Mar 10, — In his keynote, Dr Jeong-Taek Kong, v-p of corporate CAD at Samsung Semiconductor, said: “For future mobile phones such as 4G, ... › ... › EDA and IP
EDA interview: with Samsung's Jeong-Taek Kong | EDN
www.edn.com
Jeong-Taek Kong: Yes we need more integrated solutions and it has become a more complex matrix we are solving against. Whereas before we optimized for performance and area, now it is timing, power, area, yield and reliability.
Nanotechnology Now - News Story: EDA interview: with Samsung's...
www.nanotech-now.com
EDA interview: with Samsung's Jeong-Taek Kong. Abstract: "We are working somewhere below 45-nano…. It is not certain we will use it but it is an alternative. It could bring less power consumption, less variability and lower leakage power. But we are also working on carbon nanotubes, nanowire and organic systems.
Telephone & Addresses
WhitePages: Jeong Taek Kong - Phone, Address, Background info | Whitepages
View phone numbers, addresses, public records, background check reports and possible arrest records for Jeong Taek Kong. Whitepages people search is the ...
Network Profiles
LinkedIn: Jeong-Taek Kong - LinkedIn
Jeong-Taek Kong 님의 LinkedIn 프로필 보기 LinkedIn은 Jeong-Taek Kong 님과 같은 인재들이 다른 인재, 분야 전문가, 비즈니스 파트너 등과 인맥을 맺도록 도와 ...
LinkedIn: Jeong-Taek Kong - 대한민국 | 프로필 | LinkedInkr.linkedin.com › jeong-taek-kong-ab
세계 최대의 비즈니스 인맥 사이트 LinkedIn에서 Jeong-Taek Kong님의 프로필을 확인하세요. Jeong-Taek님의 프로필에 경력 2개가 있습니다. LinkedIn에서 프로필 ...
Business Profiles
patentbuddy: Jeong-Taek Kong
SAMSUNG ELECTRONICS CO., LTD., Seoul, KR, US
Education
Improving Behavioral IO Buffer Modeling Based on IBIS
journals.scholarsportal.info
Performance estimation of complex MOS gates. Authors. Jeong-Taek Kong · S.Z. Hussain · D. Overhauser. Source Information. › details
IEICE SEARCH SYSTEM
search.ieice.org
Interconnect Modeling in Deep-Submicron Design Won-Young JUNG Soo-Young OH Jeong-Taek KONG Keun-Ho LEE Publication
Heritage
Eun J Kong - Los Angeles, California - (213)
www.familytreenow.com
Hwi O Kim, 82, Mar Hyung Jin Park, 55, Sep In Yang Park, 71, Mar Jenipher Jiwon Park, 49, Jul Jeong Taek Kong, 51, Jul › gueakuaterktuuuoople
Projects
projects/semdis/swetodblp/march LSDIS
lsdis.cs.uga.edu
... Kong Hyung-Yun Kong Hyunjang Kong In-Yeup Kong Isaac Kong Jackson Kong Jae-Sung Kong Jeong-Taek Kong JeongUk Kong Jeongpyo Kong Ji-Young ...
Books & Literature
David V. Overhauser : : Booksamillion.com
www.booksamillion.com
Digital Timing Macromodeling for VLSI Design Verification by Jeong-Taek Kong, David V. Overhauser (Hardcover). $ › search
Digital Timing Macromodeling for VLSI Design Verification
www.booktopia.com.au
Booktopia has Digital Timing Macromodeling for VLSI Design Verification, The Springer International Engineering and Computer Science by Jeong-Taek Kong. › book
bokus.com: Böcker av Jeong-Taek Kong - Bokus bokhandel
› cgi-bin › p...
[IEEE Electrical Performance of Electronic Packaging
ur.booksc.eu
... packages | Young-Soek Hong, ; Joon-Ho Choi, ; Chang-Woo Ko, ; Jin-Won Kim, ; Gi-Joung Jang, ; Moon-Hyun Yoo, ; Jeong-Taek Kong, | download | BookSC. › book
Related Documents
[ ] Fast and Accurate Transaction Level Modeling of ...
arxiv.org
by YT Kim · · Cited by 26 — Authors:Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo. › cs
Runtime Distribution-Aware Dynamic Voltage Scaling
citeseerx.ist.psu.edu
by S Hong · Cited by 19 — by Sungpack Hong , Sungjoo Yoo , Hoonsang Jin , Kyu-myung Choi , Jeong-taek Kong , Soo-kwan Eo. Citations: self ... › viewdoc › summary
A practical SPICE model based on the physics and S!LK
silk.kookmin.ac.kr
by SH Lee · · Cited by 53 — Young-Jin Gu, Gi-Young Yang, and Jeong-Taek Kong, Member, IEEE. Abstract—A practical model for a single-electron transistor. › contents › myboard
PANEL: Design Challenges for Next-Generation
picture.iczhiku.com
Jeong-Taek Kong. ChrisMalachowsky. IBM Corp., Burlington, VT. Samsung Electronics Co., Ltd. NVIDIA Corp., Santa Clara, CA. Giheung, KOREA. Richard Tobias. › SHiTgyfqujAQqVvv
Scientific Publications
IMPROVING THE ESD PERFORMANCE OF INPUT ...
www.sciencedirect.com
by YK Park · · Cited by 3 — JEONG-TAEK KONG , and SANG-HOON LEE ~. ~CAE, Semiconductor R&D Center, Samsung Electronics Co., Ltd.,. San #24 Nongseo-Ri, Kiheung-Eup, Yongin-Si, ... › science › article › pii › pdf
Young-Taek Kim - dblp
dblp.org
Apr 8, — Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo: › Persons
Publications
An Efficient Statistical Analysis Methodology and Its Application to...
core.ac.uk
By Sang-hoon Lee, Chang-hoon Choi, Jeong-taek Kong, Won-seong Lee and Jei-hwan Yoo
Illumination and multi-step OPC optimization to enhance process...
spie.org
Proceedings Paper Illumination ... Moon-Hyun Yoo, Samsung Electronics Co., Ltd. (South Korea) Jeong-Taek Kong, Samsung Electronics Co., Ltd. (South Korea) ...
Digital Timing Macromodeling for VLSI Design Verification |...
link.springer.com
Digital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents...
Fast and Practical False-Path Elimination Method for Large SoC...
core.ac.uk
Fast and Practical False-Path Elimination Method for Large SoC Designs . By Chul Rim, ... Myung-soo Jang, Jin-yong Lee, Kyu-myong Choi and Jeong-taek Kong. …
Reports & Statements
EDA interview: with Samsung's Jeong-Taek Kong | EE Timeswww.eetimes.com › eda-interview-with-samsungs-jeong-taek-kong
www.eetimes.com
11 Mar · EE Times interviewed Jeong-Taek Kong, vice president in charge of EDA at the semiconductor R&D center of Samsung Electronics Co.
Miscellaneous
Aggressor classification method for analyzing crosstalk of circuit
patents.google.com
Inventor: Jae-Seok Yang: Jeong-Taek Kong: Moon-hyun Yoo: Jeong-Yeol Kim: Joon-Ho Choi; Current Assignee. The listed assignees may be inaccurate. › patent
Jeong-Taek Kong | LinkedIn
www.linkedin.com
View Jeong-Taek Kong's professional profile on LinkedIn. LinkedIn is the world's largest business network, helping professionals like Jeong-Taek Kong discover inside ...
Digital timing macromodeling for vlsi design verification - Livre
livre.fnac.com
› Jeong-Taek-Kong-Digital-timing-...
CAD for nanometer silicon design challenges and success
www.infona.pl
by JT Kong · · Cited by 54 — CAD for nanometer silicon design challenges and success. Jeong-Taek Kong · Details · Contributors · Fields of science · Bibliography · Quotations · Similar ... › resource › bwmeta1.element.iee...
Digital Timing Macromodeling for VLSI Design Verification
www.takealot.com
May 1, — by Jeong-Taek Kong · David V. Overhauser; Diary. Share. Kong, Jeong-Taek. Be the first to write a review. R 6,395. R 7,114. Free Delivery. › PLID
Fast and Accurate Transaction Level Modeling of an Extended ...
hal.archives-ouvertes.fr
by YT Kim · · Cited by 26 — Young-Taek Kim 1 Taehun Kim 1 Youngduk Kim 1 Chulho Shin 1 Eui-Young Chung 1 Kyu-Myung Choi 1Jeong-Taek Kong 1 Soo-Kwan Eo 1. Détails. › hal
ISLPED Committees
islped.org
Jeong-Taek Kong, Samsung Electronics Co., Ltd. Barry Pangrle, Synopsys Inc. Iris Bahar, Brown University Physical Design, Synthesis and Optimization ... › committees
Nam, Taek Jeong: मुफ़्त में डाउनलोड. ई-बुक पुस्तकालय. Z ...
in.booksc.org
Myung-soo Jang,, Joo-Hyun Park,, Young-Nam Yeon,, Jin-Yong Lee,, Kyu-Myung Choi,, Jeong-Taek Kong,. साल: भाषा: english. फ़ाइल: PDF, 364 KB. › ...
Resume - Stanford TCAD - StudyLib
studylib.net
[12] Sang-Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Jong Duk Lee, Byung-Gook Park, YoungJin Gu, Gi-Young Yang, and Jeong-Taek Kong, "A Practical SPICE ... › ... › Microelectronics
Roundtable: Design and CAD Challenges for Leading-Edge ...
www.academia.edu
Kong: My name is Jeong-Taek Kong. I work in design [Subsequent to this Roundtable, Richard Tobias left technology development at Samsung Electronics and ... › Roundtable_Design_and_C...
SISPAD 2004
www.sispad.info
Local Organizing Committee ; Stephen Jones, Bookham Technologies, U.K. ; Jeong-Taek Kong, Samsung Electronics Co., Ltd. Korea ; Paco Leon, Nanosys, Inc. U.S.A.. › sispad04 › organization
SOC - Architecture
ecl.unist.ac.kr
Authors, Jongeun Lee, Woo-Cheol Kwon, Tae-Hun Kim, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, and David Gwilt. › ~jlee › pubs › pages
Session 9: Modeling and Simulation — Compact Models
www3.ntu.edu.sg
Jeong-Taek Kong, Samsung Electronics Co. Ltd. 1:30 p.m.. Introduction. 1:35 p.m A New Compact Model for Junctions in Advanced CMOS Technologies, ... › exzhou › wcm › IEDM
Subject to Bankruptcy Court Approval Sample Clauses - Law ...
www.lawinsider.com
... /s/ Robert C. Melendres Name: Robert C. Melendres Title: EVP & CLO On behalf of Samsung Electronics Co., Ltd. /s/ Jeong-Taek Kong Name: Jeong-Taek Kong. › clause › subject-to-bankr...
TECHNICAL SUBCOMMITTEES - CECS
www.cecs.uci.edu
Jeong-Taek Kong. Samsung, Korea. Vinod Malhotra. Numeritech. Jay Michlin. Consultant. Sharad Saxena. PDF Solutions. Tuna Tarim. Texas Instruments. Hoon-Sang Jin, Myung-Soo Jang, Jin-Suk Song, Jin-Yong Lee, Taek-Soo Kim, and Jeong-Taek Kong. CAE, Semiconductor R&D Center, Samsung Electronics Co., Ltd. › isqed03 › pdffiles › techcom › papers › islped99 › pdffiles
Team - AI-EDA - Kaist
aieda.kaist.ac.kr
Jeong-Taek Kong received the Ph.D. degree in Electrical Engineering from Duke University, Durham, NC, in From to 2013, he was with Samsung ... › ...
Related search requests for Jeong-Taek Kong
| Joon-Ho Choi |
Person "Kong" (1) Forename "Jeong-Taek" (1) Name "Kong" (4371) |
sorted by relevance / date