Department of Electrical & Computer Engineering | Faculty
ece.utdallas.edu
Dr. Dian Zhou Professor, Ph.D.: University of Illinois Research interests: VLSI design, CAD tools and algorithms, and mixed signal circuits.
UCSD VLSI CAD Laboratory
vlsicad.ucsd.edu
Prof. Dian Zhou Dr. Zhengyong Zhu Dr. Yervant Zorian. Contact Information for UCSD ABK GROUP: EBU3 Building UCSD, Computer Science and Engineering Department
SCEAS
sceas.csd.auth.gr
Publications of Author. Haksu Kim, Dian Zhou An automatic clock tree design system for high-speed VLSI designs: planar clock routing with the treatment of obstacles.
On Optimal Interconnections for VLSI - Andrew B. Kahng, Gabriel...
books.google.co.uk
Dian Zhou provided us with the original “Two-Pole” simulator code, while Sudhakar Muddu provided invaluable amendments to this code and the totality of ...
Modeling and Simulation of High Speed VLSI Interconnects: A Special...
books.google.de
Modeling and Simulation of High Speed VLSI Interconnects brings together in one place important contributions and state-of-the-art research results in this...
An adaptive wavelet method for nonlinear circuit simulation ...
math2.uncc.edu
Dian Zhou, Wei Cai, and Wu Zhang Abstract— The advance of very large scale integrated (VLSI) systems has been continuously challenging today’s circuit simula-
A fast wavelet collocation method for high-speed Semantic Scholar
www.semanticscholar.org
A Fast Wavelet Collocation Method for High-Speed Circuit Simulation. Dian Zhou and Wei Cai. Abstract—The advance of very large scale integration (VLSI).
Optimization in VLSI Synthesis and Layout - Hindawi
www.hindawi.com
Optimization in VLSI Synthesis and Layout. Guest Editors: S. Q. Zheng and D. Zhou. Preface, Si-Qing Zheng and Dian Zhou Volume 2 (1994), Issue 2, Pages i-i ...
Design and Verification of High-Speed VLSI Physical Design |...
link.springer.com
Dian Zhou received the B.S. degree in physics and M.S. degree in electrical engineering from Fudan University, P.R. China, in and 1985, respectively, and ...
On the optimization of VLSI allocation in high-level synthesis |...
link.springer.com
Allocation is one of main tasks in the high-level synthesis. It includes module, functional unit allocation, storage allocation and interconnection allocat
Google Groups: Ph. D. Seeking a job @ VLSI, Testing, CAD, CAE, Simulation
: Dian Zhou (Research Advisor) EE Dept. UNC Charlotte, Charlotte, NC , Ph.: *****************************End of Resume ...
Google Groups: a position as an engineer in VLSI design, simulation, or testing ...
: Dian Zhou (Research Advisor) EE Dept. UNC Charlotte, Charlotte, NC , Ph.: Shyang-Tai Su Electrical Engineering University of North ...
Google Groups: NA Digest, V. 00, # 18
: Dian Zhou (Electrical Engineering, University of Texas, Dallas) Model reduction in VLSI designs For information please contact Tianyuan Zhang Institute of ...
Google Groups: MSEE seeking VLSI/CAE position:
: REFERENCES Rafic Z. Makki Dian Zhou Dept. of Elec. Engg Dept. of Elec. Engg UNC, Charlotte UNC, Charlotte NC NC (704) (704) ...
All web results to the name "Dian Zhou"
RIA: Layout Design of VLSI Multichip Modules - Dian Zhou
grantome.com
This research is on layout problems in ultra-large-scale- integration (ULSI). The nature of the multichip module (MCM) layout problem and associated design ...
NSF Young Investigator: Performance-Driven VLSI Designs - Dian Zhou
grantome.com
grants from Dian Zhou · See 446 grants from University of North Carolina at ...
IEEE Transactions on Circuits and Systems I - Darlington Best Paper...
tcas1.polito.it
Dian Zhou, Franco P. Preparata and S. M. Kang Interconnection Delay in Very High-Speed VLSI TCAS, Volume: 38, Issue: 7, July 1991, Pages:
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